1. Field of the Invention
The present invention relates to a stacked capacitor in which a high-dielectric constant material is used in a dielectric film, as well as a method of manufacturing the same.
2. Description of the Background Art
A DRAM (dynamic random access memory) is generally composed of a memory array block that is a storage area for storing a plenty of memory data, and a peripheral circuit block needed in handling input/output operation to the exterior. In the memory array block occupying a large area on a semiconductor chip, a plurality of memory cells storing unit memory data are disposed in a matrix.
A single memory cell is generally composed of one MOS transistor and one capacitor connected thereto. This memory cell is called xe2x80x9cone-transistor one-capacitor type memory cell.xe2x80x9d This type of memory cell has a simple configuration, thereby making it easy to improve the integration degree of a memory array. Therefore it has found wide use in mass DRAMs.
There are various types of capacitors, for example, a so-called stacked capacitor type. The stacked capacitor has the feature that the opposed-surface area between the capacitor electrodes is increased by allowing the electrode and dielectric film of the capacitor to extend above a field oxide film and above the gate electrode of a transistor. Since the stacked capacitor has this feature, it is easy to ensure the electrostatic capacity of the capacitor even when the scale down of elements is advanced with integration of semiconductor memory. Thus, the stacked capacitor has come into increasing use due to high integration of semiconductor memory.
When the scale down of elements is advanced, it requires that a stacked capacitor is made high for ensuring the opposed surface area between electrodes while minimizing its lateral extending. In its present state of a significant advancement of scale down, however, it is going to be no longer capable of securing a predetermined electrostatic capacity by such a method of improving the structure. This is true for trench capacitors and cylindrical capacitors which are of other typical three-dimensional capacitor structure.
Upon this, in order to increase the electrostatic capacity of capacitors, some attempts have been made to employ, as a dielectric film, a high-dielectric constant material such as BST (barium strontium titanate). FIG. 19 is a cross section illustrating a capacitor part of a DRAM memory cell in which a high-dielectric constant material, e.g., BST, is used as a dielectric film.
Referring to FIG. 19, a dielectric film 8 composed of a high-dielectric constant material is sandwiched by an upper electrode 9, lower electrode 5D and sidewall lower electrode 7D. The lower electrode 5D is connected to a conductive plug 3 via a barrier metal 13. The conductive plug 3 extends through an interlayer insulting film 2 and makes connection with the top surface of a semiconductor substrate 1. An interlayer insulating film 10 is disposed on the upper electrode 9. The dielectric film 8, upper electrode 9, barrier metal 13, lower electrode 5D and sidewall lower electrode 7D are insulated from the semiconductor substrate 1 by the interlayer insulating film 2. These components as described constitute a stacked capacitor.
For instance, platinum is used for the upper electrode 9, lower electrode 5D and sidewall lower electrode 7D, and titanium nitride is used for the barrier metal 13. The interlayer insulating films 2 and 10 are formed of a silicon oxide film or the like. The dielectric film 8 composed of a high-dielectric constant material, e.g., BST, is formed by means of reactive sputtering, CVD (chemical vapor deposition), or the like.
A transistor and an element isolation region comprising a silicon oxide film or the like, which are not shown in FIG. 19, are disposed on the top surface of the semiconductor substrate 1. Aluminum wiring, which is also not shown, is disposed above the stacked capacitor.
In the capacitor of conventional memory cells of a DRAM, polycrystalline silicon is used for upper and lower electrodes, and a silicon oxide film obtained by the thermal oxidation of silicon, or a silicon nitride film formed by CVD method, is used as a dielectric film. All of these films are of a silicon compound, and are easily formed on the lower electrode composed of polycrystalline silicon.
If an attempt were made to apply a dielectric film composed of BST to a conventional capacitor structure so that it is formed on a lower electrode composed of polycrystalline silicon, the polycrystalline silicon that is electrochemically base is easily oxidized with the oxygen atoms of the BST. As a result, a silicon oxide film is formed at the interface of the dielectric film and lower electrode. Since the silicon oxide film has a low dielectric constant, it nullifies the effect of the high-dielectric constant material, which causes a substantial reduction in the electrostatic capacity of the capacitor and also raises the resistance value of the polycrystalline silicon as the lower electrode. These problems also occur in the upper electrode.
Therefore, when a high-dielectric constant material, e.g., BST, is used for a dielectric film, a noble metal that is electrochemically noble and has strong oxidation resistance is used for upper and lower electrodes. Examples of the noble metal are platinum, iridium and palladium. For this reason, platinum is exemplified as the material of the upper electrode 9, lower electrode 5D and sidewall lower electrode 7D in the stacked capacitor shown in FIG. 19. The sidewall lower electrode 7D is provided in order to avoid that the barrier metal 13 makes a direct contact with the dielectric film 8 to cause a chemical reaction.
In the stacked capacitor of FIG. 19, when a material composed of silicon, e.g., polycrystalline silicon, is used for the conductive plug 3, unless the barrier metal 13 is present, silicidation might take place between the lower electrode 5D and conductive plug 3, resulting in an increase in resistance value. In addition, the oxygen atoms which departed from the dielectric film 8 or the like, and then penetrated the lower electrode 5D, may reach the conducive plug 3 and semiconductor substrate 1, thereby oxidizing them. It is therefore necessary to dispose a conductive barrier metal between the lower electrode 5D and conductive plug 3, by which the element diffusion therebetween is suppressed. The barrier metal 13 of FIG. 19 is provided for this reason.
In a conventional stacked capacitor employing a dielectric film composed of a high-dielectric constant material, a lower electrode 5D is shaped by dry etching.
FIG. 20 is a cross section illustrating a step in the course of manufacturing the lower electrode 5D. FIG. 20 shows the state that, by using a patterned resist 12 as a mask, the lower electrode 5D is subjected to a dry etching, thereafter, a barrier metal 13 is also subjected to a dry etching.
When a noble metal, e.g., platinum, is employed as a lower electrode 5D, the dry etching of the lower electrode 5D causes the problem that the etched noble metal particles tend to redeposit on the side surfaces of a resist 12 and the lower electrode 5D. For this reason, in FIG. 20, redeposit 14 is present on the side surfaces of the resist 12 and the lower electrode 5D.
Therefore, the pattern size b of the lower electrode 5D and barrier metal 13 to be provided after etching is greater than the pattern size a of the resist. This tendency increases with greater thickness of the lower electrode 5D to be etched. That is, the pattern size according to design cannot be achieved, which requires some corrective actions such that allowance should be made in the design of a circuit pattern, resulting in a tedious work.
Thus, a noble metal such as platinum has the advantage of being chemically stable, while it has the disadvantage of having difficulties in dry etching. It becomes therefore more difficult to prepare a minute lower electrode using a noble metal, e.g., platinum, as the integration of DRAMs is further advanced.
In the conventional stacked capacitor shown in FIG. 19, in order to increase the contact area between the conductive plug 3 and barrier metal 13, when the diameter of the conductive plug 3 is increased at low mask alignment accuracy, there is the possibility that the conductive plug 3 will make contact with the dielectric film 8 or the sidewall lower electrode 7D.
In the case that the dielectric film 8 is composed of BST and the conductive plug 3 is composed of polycrystalline silicon, when the conductive plug 3 and the dielectric film 8 come into contact with each other, there is the possibility that the polycrystalline silicon might be easily oxidized with the oxygen atoms of the BST. That is, the elements of the dielectric film 8 might reach the conductive plug 3, causing a chemical reaction. In contrast, there will be the possibility that the elements of the conductive plug 3 reach the dielectric film 8, causing a chemical reaction. Further, in the event that the sidewall lower electrode 7D makes contact with the conductive plug 3, a chemical reaction might take place therebetween, as in the case that the barrier metal 13 is absent as described.
Again in the event that the lower electrode 5D, sidewall lower electrode 7D and barrier metal 13 are further subjected to a lateral scale down and the diameter of the conductive plug 3 is thus relatively increased, at low mask alignment accuracy, there is the possibility that the conductive plug 3 and the dielectric film 8 or the sidewall lower electrode 7D might come into contact with each other.
According to a first aspect of the present invention, a stacked capacitor comprises: a substrate having a main surface; an interlayer insulating film disposed on the substrate; a conductive plug extending through the interlayer insulating film and reaching the main surface of the substrate; an insulating film covering the interlayer insulating film and the conductive plug; a first conductive layer extending through the insulating film and being connected to the conductive plug; a dielectric film disposed so as to cover the first conductive layer and the insulating film; and a second conductive layer disposed so as to cover the dielectric film.
According to a second aspect, the stacked capacitor of the first aspect further comprises: a top protective film disposed on the top surface of the first conductive layer; and a sidewall conductive layer disposed on side surfaces of the first conductive layer and the top protective film.
According to a third aspect, the stacked capacitor of the second aspect is characterized in that the top protective film is a conductive film.
According to a fourth aspect, the stacked capacitor of the second aspect further comprises a barrier metal conductive layer disposed between the sidewall conductive layer and the first conductive layer.
According to a fifth aspect, the stacked capacitor of the first aspect is characterized in that the first conductive layer has a taper.
According to a sixth aspect, the stacked capacitor of the first aspect is characterized in that the first conducive layer projects into a part the conductive plug and extends vertically from the conductive plug.
According to a seventh aspect, a method of manufacturing a stacked capacitor comprises the steps of: (a) preparing a substrate which has a main surface an interlayer insulating film formed on the main surface, and a conductive plug extending through the interlayer insulating film and reaching the main surface; (b) forming a film to be etched on the substrate; (c) forming a pattern so as to project into the conductive plug while extending upwards from the conductive plug and extending through the film to be etched; (d) forming a first conductive layer within the pattern; (e) removing the film to be etched; (f) forming a dielectric film so as to cover the first conductive layer; and (g) forming a second conductive layer so as to cover the dielectric film.
According to an eighth aspect, the method of the seventh aspect further comprises the step of (h) forming an insulating film having etching selectivity to the film to be etched, on the interlayer insulting film and the conductive plug, which step is performed before the step (b), wherein the pattern in the step (c) extends through the insulating film.
According to a ninth aspect, the method of the seventh or eighth aspect further comprises the step of (i) tapering the first conductive layer, which step is performed before the step (f).
According to a tenth aspect, the method of the seventh or eighth aspect further comprises the steps of: (j) forming a top protective film on the top of the first conductive layer, which step is included in the step (d); (k) forming a third conductive layer so as to cover the first conductive layer and the top protective film, which step is performed after the step (e); and (l) performing an etch back of the third conductive layer to form a sidewall conductive layer on side surfaces of the first conductive layer and the top protective film, which step is performed before the step (f).
According to an eleventh aspect, the method of the tenth aspect is characterized in that the top protective film in the step (j) is formed by thermal oxidation.
According to a twelfth aspect, the method of the tenth aspect is characterized in that the top protective film in the step (j) is a conductive film.
According to a thirteenth aspect, the method of the tenth aspect further comprises the steps of: (m) forming a fourth conductive layer so as to cover the first conductive layer and the top protective film, which step is performed after the step (e); and (n) performing an etch back of the fourth conductive layer to form a barrier metal conductive layer on side surfaces of the first conductive layer and the top protective film, which step is performed after the step (m) and before the step (k).
According to a fourteenth aspect, the method of the seventh or eighth aspect further comprises the step of (j) forming a top protective film which is a conductive film on the top of the first conductive layer, which step is included in the step (d), wherein the step (j) comprises the steps of: forming a replacement metal on the top of the first conductive layer; and replacing the replacement metal with the top protective film.
According to a fifteenth aspect, the method of the seventh or eighth aspect further comprises the step of (j) forming a top protective film which is a conductive film on the top of the first conductive layer, which step is included in the step (d), wherein the top protective film easily melts when heated, and the top protective film is heated so as to melt after formation of the top protective film in the step (j).
According to a sixteenth aspect, the method of the seventh or eighth aspect further comprises the step of (j) forming a top protective film which is a conductive film on the top of the first conductive layer, which step is included in the step (d), wherein the top protective film comprises first and second portions. The step (j) comprises the steps of: forming the first portion of the top protective film on the top of the first conductive layer; and employing a plating method using the first portion of the top protective film as an electrode, thereby further forming the second portion of the top protective film.
According to a seventeenth aspect, the method of the seventh or eighth aspect further comprises the step of (j) forming a top protective film which is a conductive film on the top of the first conductive layer, which step is included in the step (d). The step (j) comprises the steps of: forming the top protective film on the top of the first conductive layer and the film to be etched; forming a resist on the top protective film, the resist having a pattern covering the top of the first conductive layer; performing an etching of the top protective film using the resist as a mask, thereby removing a portion of the top protective film on the film to be etched which is not covered by the resist; removing the resist; and performing an etch back of the top protective film by a predetermined amount.
According to an eighteenth aspect, the method of the fourteenth or seventeenth is aspect further comprises the steps of: (k) forming a third conductive layer so as to cover the first conductive layer and the top protective film, which step is performed after the step (e); and (l) performing an etch back of the third conductive layer to form a sidewall conductive layer on side surfaces of the first conductive layer and the top protective film, which step is performed before the step (f).
With the stacked capacitor of the first aspect, the presence of the insulating film suppresses occurrence of a chemical reaction between the conductive plug and dielectric film.
With the stacked capacitor of the second aspect, the presence of the top protective film suppresses occurrence of a chemical reaction between the first conductive layer and dielectric film. Further, a chemical reaction between the conductive plug and sidewall conductive layer is suppressed by employing, as an insulating film, a material that can also suppress the mutual diffusion of the elements constituting the sidewall conductive layer and the elements constituting the conductive plug. In addition, the presence of the sidewall conductive layer prevents the first conductive layer from making a direct contact with the dielectric film. Thereby, a material that will cause a chemical reaction with the dielectric film can be used as the first conductive layer. If the sidewall conductive layer is tapered, it is hard to cause field concentration at the time of operation, thus leading to improved reliability and durability of the capacitor.
With the stacked capacitor of the third aspect, the area of the conductive portion in contact with the dielectric film is increased, permitting an increase in electrostatic capacity.
With the stacked capacitor of the fourth aspect, the presence of the barrier metal conductive layer suppresses occurrence of a chemical reaction between the first conductive layer and the sidewall conductive layer can be suppressed. Thereby, a material that will cause a chemical reaction with the sidewall conductive layer can be used as the first conductive layer.
With the stacked capacitor of the fifth aspect, due to the tapered first conductive layer, it is hard to cause field concentration at the time of operation, thus leading to improved reliability and durability of the capacitor.
With the stacked capacitor of the sixth aspect, the first conductive layer is hard to tumble during the manufacturing steps, because the first conductive layer projects into the conductive plug. When the top surface of the conducive plug is not completely covered with the first conducive layer, the contact area between the first conductive layer and conductive plug is increased by the amount of the side surface corresponding to projected portion, as compared with the case of having no projection. Thereby, the resistance between the first conductive layer and conductive plug is lowered.
With the method of manufacturing a stacked capacitor according to the seventh aspect, a pattern is formed within a film to be etched in order to form a first conducive layer. Therefore, the first conductive layer can be formed as a slender lower electrode by that a material which is easy to fabricate and has a large thickness is used for a film to be etched, and a pattern having a narrow width is formed in the film to be etched. In addition, since the first conductive layer is formed so as to project into the conductive plug, it is hard to tumble or displace when the film to be etched is removed in the step (e).
The method of the eighth aspect can manufacture the stacked capacitor of the first or sixth aspect. Because an insulating film that has etching selectivity against a film to be etched is formed beneath the film to be etched, the insulating film can be utilized as an etching stopper for use in removing the film to be etched.
The method of the ninth aspect can manufacture the stacked capacitor of the fifth aspect.
With the method of the tenth aspect, a sidewall conductive layer is tapered because it is formed by performing an etch back in the step (l). This enables to manufacture the stacked capacitor of the second aspect. It is also possible to make a slender lower electrode having on its surface a difficult-to-bury material, by employing as the first conductive layer a material easily buried in the pattern, and covering its surface with the sidewall conductive layer. This method is effective when it is desired to employ, as the electrode, a material that cannot be well deposited up to the bottom of the pattern by the existing technique.
With the method of the eleventh aspect, since the top protective film is formed by thermal oxidation, the manufacturing steps can be simplified than the case that the material for a top protective film is allowed to fill the part which is ensured by performing an over etching of the first conductive layer within the pattern.
The method of the twelfth aspect can manufacture the stacked capacitor of the third aspect.
The method of the thirteenth aspect can manufacture the stacked capacitor of the fourth aspect. In addition, it is possible to employ, as a first conductive layer, a material which will cause a chemical reaction with the sidewall conductive layer and be easily buried in the pattern. Even with a narrow-width pattern, the first conductive layer can be formed reliably.
With the method of the fourteenth aspect, the replacement metal is replaced with the top protective film. This enables to obtain a structure into which a top protective film having a sufficient film thickness is buried even if the material for the top protective film cannot be well deposited by the existing technique of CVD.
With the method of the fifteenth aspect, the top protective film is formed, and then heated and melted so that it flows into the top of the first conductive layer. This enables to obtain a structure into which a top protective film having a sufficient film thickness is buried even if the material for the top protective film cannot be well deposited by the existing technique of CVD.
With the method of the sixteenth aspect, a plating method is employed using the first portion of the top protective film as an electrode to further form the second portion of the top protective film. Therefore, it is possible to obtain a structure into which a top protective film having a sufficient film thickness is buried even if the material for the top protective film cannot be well deposited by the existing technique of CVD.
With the method of the seventeenth aspect, an etching of the top protective film is performed using a resist as a mask to remove a portion of the top protective film on the film to be etched which is not covered by the resist, and an etch back of a remaining portion of the top protective film is performed by a predetermined amount. This enables to remove a portion existing above the surface of the film to be etched for a short period of time, thereby reducing the film reduction amount of the top protective film. Consequently, the film thickness of the top protective film can be maintained thicker than in the case that an etch back of the top protective film formed on the top of the first conductive layer and the film to be etched is performed without using a resist.
With the method of the eighteenth aspect, a sidewall conductive layer is tapered because it is formed by performing an etch back in the step (l). This enables to manufacture the stacked capacitor of the third aspect. It is also possible to make a slender lower electrode having on its surface a difficult-to-bury material, by employing as the first conductive layer a material easily buried in the pattern, and covering its surface with the sidewall conductive layer. This method is effective when it is desired to employ, as the electrode, a material that cannot be well deposited up to the bottom of the pattern by the existing technique.
It is, accordingly, an object of the present invention to overcome the disadvantages in the prior art by providing a method of manufacturing a stacked capacitor with which it is easy to fabricate even when a noble metal, e.g., platinum, is used for a lower electrode, and providing a stacked capacitor that can suppress a chemical reaction between a dielectric film or a sidewall lower electrode and a conductive plug.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.